Manufacturing Your Own Chips: Is Open Source (like RISC-V) Making it Easier? project image

Manufacturing Your Own Chips: Is Open Source (like RISC-V) Making it Easier?

Maker Faire Bay Area 2017

May 19th-21st

Presentation Open Source

This panel will feature prominent members of the RISC-V and open-source communities and will discuss the free and open RISC-V architecture (past, present and future) and the general future of chips and how RISC-V plays into that vision. Panelists will also discuss the democratization of silicon.


Sat 20 Sat 20 May 2017
Maker Pro
12:15 pm
David Patterson Maker Picture

David Patterson

David Patterson is an American computer pioneer and academic who has held the position of Professor of Computer Science at the University of California, Berkeley, since 1976. He announced retirement in 2016 after serving nearly 40 years. He is noted for his pioneering contributions to RISC processor design, having coined the term RISC, and by leading the Berkeley RISC project.
Jack Kang Maker Picture

Jack Kang

Jack is currently Vice President of Product and Business Development at SiFive. Prior to SiFive, Jack held a variety of senior business development, product management, and product marketing roles at both NVIDIA and Marvell, with a long track record of very successful, large scale design wins. Jack started his career as a frontend design engineer, with a focus on CPU architecture and design. Jack received his BS degree in Electrical Engineering and Computer Science from UC Berkeley.
Madelynn Martiniere Maker Picture

Madelynn Martiniere

Madelynn Martiniere is the Director of Community at Fictiv, a manufacturing platform helping engineers and designers build the next generation of hardware products through advanced fabrication and accessible engineering education. Prior to Fictiv, she founded Spark Plug Labs, a consultancy that supported both startups and large brands building sustainable communities around technology. She is an active mentor and educator on engineering communities, the new industrial revolution, and open source hardware.

Ted Speers Maker Picture

Ted Speers

Ted Speers is Head of Product Architecture and Planning for Microsemi’s SoC Group, responsible for defining their roadmap for low power, secure, reliable FPGAs and SoC FPGAs. He joined Microsemi in 1987 and held roles in process engineering and product engineering before assuming his current role in 2003. He is a Technical Fellow and co-inventor on 35 US Patents. Prior to joining Microsemi, he worked at LSI Logic. Ted has a BS in Chemical Engineering from Cornell.

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